A 12.5 Gbps clock and data recovery circuit with phase interpolation based digital locked loop
نویسندگان
چکیده
منابع مشابه
An All-Digital Phase-Locked Loop (ADPLL)-Based Clock Recovery Circuit
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ژورنال
عنوان ژورنال: IEICE Electronics Express
سال: 2020
ISSN: 1349-2543
DOI: 10.1587/elex.17.20200302